Dynamic Random Access Memory

(dee-ram)

A form of memory that is relatively inexpensive to manufacture; but, by its nature, requires constant updating unless data stored in it is lost. (Data in each memory location is maintained by a capacitor which only holds a charge for a short time. This charge must be refreshed frequently.)

The first commercial DRAM chip (Intel 1103) was introduced in 1970. Early chips stored up to 16Kbits. Multiple chips were needed to accommodate storage of data bytes as each byte consists of eight bits plus an error correcting bit.

Surface mounting of chips began with 256Kbit DRAM. This, and other improvements, reduced the size of DRAM components. More recently, chips are all mounted onto modules which plug into memory slots in the computer. The modules include the Single In-line Pin Module (SIP), Single In-line Memory Module (SIMM), and Dual In-line Memory Module (DIMM).

DRAMs are constructed with arrays of rows and columns; data being stored at the intersections. Data is read by reading out all bits in a row to a buffer (disharging the storage capacitors in the process). The required datum or data is read from the buffer and the bits are then written back out to the storage row (refreshing the storage capacitors). If data in a particular row has not been read and refreshed before the capacitors need to be refreshed then that row must be refreshed by the controller. Refresh rates vary with the construction of the DRAM but have typically tended toward 16 microseconds or so.

There are many different types of DRAM:

• Pseudo Static Random Access Memory (PSRAM). DRAMs with a built-in address multiplexer and refresh controller.
• Nibble Mode DRAM. A nibble is 4 bits so this type supplies four successive bits on one data line.
• Page Mode DRAM. Provides faster access to data in the currently-open row.
• Static Column DRAM. Similar to Page Mode DRAM but access to the data is controlled differently.
• Extended Data Out DRAM (EDO DRAM). Works with to different addresses at the same time.
• Video RAM (VRAM). Provides for a serial data stream sent to a CRT in order to control the strength of the electron beam. The computer can write into this memory while data is streaming out.
• Synchronous DRAM (SDRAM). Allows for output in bursts according to a clock signal in the control signals.
• Cached DRAM (CDRAM). Adds a static RAM array to the DRAM chip. The static RAM is used as an on-chip cache to speed up access (though its controller is external to the chip).
• Rambus DRAM (RDRAM). A high speed version of DRAM which changes the DRAM system interface from bits to a byte-wide bus. RDRAM can only be used in specially-designed systems.

More Information

• RAM Guide